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Freescale Semiconductor /MK61F15WS /DRY /PPR

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Interpret as PPR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)TPP0RESERVED0 (0)TPID0RESERVED

TPID=0, TPP=0

Description

DryIce Pin Polarity Register

Fields

TPP

Tamper Pin Polarity

0 (0): Tamper pin expected value is not inverted.

1 (1): Tamper pin expected value is inverted.
RESERVED

no description available
TPID

Tamper Pin Input Data

0 (0): Tamper pin input data (before glitch filter) is logic zero.

1 (1): Tamper pin input data (before glitch filter) is logic one.
RESERVED

no description available

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data